1. Technical Field
This invention relates to a method for fabricating electronic components having a hollow package structure with a ceramic lid. More particularly, this invention relates to a method for fabricating electronic components efficiently and with high reliability with respect to resistance to humidity and the like by bonding an electronic component having a hollow package structure with a ceramic lid to a ceramic substrate using an organic bonding agent, particularly through an organic polymeric material provided so as to intervene the substrate and a surface of the ceramic to be bonded.
2. Description of Related Art
Hermetic sealing (gas-tight sealing) is used mainly for IC packaging. More particularly it is generally used as a treatment for incorporating semiconductors by establishing a gas-tight structure in advance or as a treatment for establishing a gas-tight structure on the side of the package after semiconductors are incorporated.
As a conventional method for gas-tight sealing electronic components (semiconductors) with a ceramic lid, there have been generally used low melting point glass seal and soldering of ceramic lid-sealed surface side of the electronic components through metallized layer made of Ag/Pt or the like.
However, these conventional techniques have the following technical problems.
First, hermetic seals with low melting point glass needs a high temperature treatment which is conducted at a sealing temperature in the range of from about 350 to 450.degree. C. Semiconductors must be bonded to a substrate at temperatures not lower than the sealing temperature. Therefore, it is often the case that the semiconductors suffer damages due to thermal history upon the bonding.
Next, when soldering is conducted, the sealed surface of a package cannot be the same surface of the substrate as that where input-output terminals are arranged. This inevitably requires formation of a multi-layer structure either on a part of a main surface of the substrate or on the entire main surface of the substrate and provision of an insulating layer between the surface to be sealed and the surface on which input-output terminals are arranged. This complicates the design of the electronic components. In addition, solder particles which could scatter upon sealing will attach to the semiconductors and adversely affect the characteristics thereof.
In many cases, sealing treatments are conducted on a surface to be sealed which has been embossed in order to reduce voids in the sealing material due to use of high sealing temperatures, i.e., reduce potential defects in the sealed portion due to formation of foams in the sealed portion accompanied by an increase in the internal pressure of the space created by sealing or formation or release of foams from the sealant used, and form a proper meniscus (surface contour due to surface tension). Further, the sealing treatments are conducted generally in an atmosphere of an inert gas such as nitrogen. However, there is room left to the sealing treatments for further improvement in their process and also there is a demand for more efficient, low cost method for fabricating electronic components.
In order to solve the above-described problems, one might consider an approach in which sealing is conducted in low temperature ranges with an organic adhesive or bonding agent. However, the method using organic bonding agents suffers various problems that the bonding interface has poor resistance to humidity and organic seal and the bonded interface are permeable to moisture vapor due to hygroscopicity. Moisture vapor permeability is a major factor which damages semiconductors and, hence, it is very important to minimize the moisture vapor permeability of the sealing material for practical application.
As the method using organic seal, there have been employed various methods, for example, a pitting method which involves bonding a dam for preventing dripping of the sealant on an outer periphery of the substrate and covering a silicone elastomer or the like on the entire surface of the packaging area, or a method in which a substrate having circuitry thereon and a lid made of a metal, ceramic or the like are coated with an solvent-free epoxy resin powder and heated to bond to each other for sealing, an external lead terminal is attached to the circuitry and then the substrate with the lid is entirely covered with a polymer (Japanese Patent Application Laid-open No. 79267/1988). These conventional methods have the following problems.
(1) Gold (Au) or aluminum (Al) wires connecting the semiconductor to the substrate tend to suffer electrical disconnection due to stress generated upon sealing depending upon the shape of the wire.
(2) Electronic components sometimes fail to exhibit expected electric properties due to physical properties, such as dielectric constant, of the sealing material (e.g., the above-described silicone elastomer, epoxy resin used for covering, and the like).
(3) Molding or pitting with a resin so that the electronic components are covered entirely, the overall thermal resistance of the component increases to some extent so that radiation of heat decreases. As a result, it is often difficult to ensure that the electronic component operates under the conditions where a sufficient allowance for safety operation is reserved to the semiconductor.
(4) Semiconductors themselves suffer failure or damage due to stress or strain urged or generated upon molding or the reliability of the device tends to be harmed due to a difference in linear expansion coefficient between the sealing resin and the material of the substrate
(5) In the case of electronic components which generates a negligible amount of heat, a heat sink made of, e.g., aluminum, copper, or alloys based thereon must be provided on a rear surface of the component. However, it is difficult to use a heat sink to the method which involves covering the entire component with a resin as described in Japanese Patent Application Laid-open No. 79267/1988 because of restriction from structural viewpoint.